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| Silan Semiconductors DIGITAL CONTROLLED STEREO AUDIO PROCESSOR WITH LOUDNESS DESCRIPTION The SC7313 is a volume, tone (bass and treble), balance (left/ right) and fader(front/rear) processor for quality audio applications in car radio and Hi-Fi systems. Selectable input gain and external loudness function are provided. Control is accomplished by serial I2C bus microprocessor interface. The AC signal settings is obtained by resistor networks and switches combined with operational amplifiers. Due to the Used BIPOLAR/CMOS technology, low distortion, low noise and low DC stepping are obtained. SC7313 SOP-28 DIP-28 FEATURES * Input multiplexer: --3 stereo inputs --Selectable input gain for optimal adaptation to different sources * Four speaker attenuators: --4 independent speakers control in 1.25dB steps for balance and fader facilities --Independent mute function * All functions programmable via serial I2C Bus * Loudness function * Volume control in 1.25dB steps * Treble and bass control * Input and output for external equalizer or noise reduction system ORDERING INFORMATION Device SC7313 SC7313S Package DIP-28-600-2.54 SOP-28-375-1.27 PIN CONFIGURATIONS CREF VDD GND L TREBLE R IN(R) OUT(R) LOUD R R3 RIGHT INPUTS 5 6 7 8 9 24 OUT RF 23 OUT LR 1 2 3 4 28 SCL 27 SDA 26 DIG GND 25 OUT LF BUS INPUTS SC7313 22 OUT RR 21 BOUT(R) 20 BIN(R) BASS R2 10 R1 11 19 BOUT(L) 18 BIN(L) 17 OUT(L) 16 IN(L) 15 L1 LOUD L 12 LEFT INPUTS L3 13 L2 14 ) LEFT INPUTS HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 1 Silan Semiconductors BLOCK DIAGRAM OUT (L) 17 IN LOUDNESS B-OUT (L) (L) (L) 16 12 19 B-IN (L) 18 TREBLE (L) 4 SPEAKER ATT SC7313 INPUT SELECTION & GAIN CONTROL 15 LEFT INPUTS VOLUME & LOUDNESS MUTE SPEAKER ATT LEFT 25 FRONT OUT 14 BASS TREBLE 23 MUTE LEFT REAR OUT SCL SDA BUS 13 28 SERIAL BUS DECODER + LATCHES 27 26 DIG-GND 9 RIGHT INPUTS SPEAKER ATT 10 VOLUME & LOUDNESS BASS TREBLE MUTE RIGHT 24 FRONT OUT 11 SPEAKER ATT CREF 1 SUPPLY MUTE 22 RIGHT REAR OUT 2 VDD 3 7 6 8 21 20 5 TREBLE (R) A-GND OUT (R) IN LOUDNESS B-OUT B-IN (R) (R) (R) (R) ABSOLUTE MAXIMUM RATINGS Characteristic Supply Voltage Operating Temperature Storage Temperature Symbol VS Tamb Tstg Value 10.2 -40 ~ +85 -55 ~ +150 Unit V C C QUICK REFERENCE DATA Characteristic Supply Voltage Maximum input signal handling Total harmonic distortion ,V=1Vrms, f=1kHz Signal to noise ratio Channel separation, f=1kHz Volume control, 1.25dB step Bass and treble control, 2dB step Fader and balance control, 1.25dB step Input gain, 3.75dB step Mute attenuation Symbol Vs VCL THD S/N Sc Min. 6 2 Typ. 9 0.01 106 103 Max. 10 0.1 Unit V Vrms % dB dB -78.75 -14 -38.75 0 100 0 +14 0 11.25 dB dB dB dB dB HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 2 Silan Semiconductors ELECTRICAL CHARACTERISTICS (Refer to the test circuit) (Tamb=25C VS=9.0V,RL=10k RG=600 SC7313 all controls flat(G=0), f=1kHz,Unless otherwise specified) Parameter SUPPLY VOLTAGE Operating Supply Voltage Operating Supply Current Ripple rejection of Supply Voltage Symbol Test conditions Min Typ Max Unit VS IS SVR 6 9 20.0 10.0 35.0 V mA dB 60 80 INPUTS SELECTORS Input resistance Clipping Level Input Separation (note 2) Output load resistance Minimum input Gain Maximum input gain Step resolution Input noise DC steps VOLUME CONTROL Input resistance Control range Minimum attenuation Maximum attenuation Step resolution Attenuation set error Tracking error DC steps SPEAKER ATTENUATORS Control Range Step resolution Attenuation Set error Output Mute Attenuation DC steps Crange SSTEP EA AMUTE VDC Adjacent attenuation steps From 0dB to MUTE 80 100 0 1 3 10 35 0.5 37.5 1.25 40 1.75 1.5 dB dB dB dB mV mV RIV Crange AV(min) AV(max) ASTEP EA ET VDC Adjacent attenuation steps From 0dB to AV max 0 0.5 AV=0 to -20dB AV=-20 to -60dB 20 70 -1 70 0.5 -1.25 -3 33 75 0 75 1.25 0 50 80 1 80 1.75 1.25 2 2 3 7.5 dB mV mV k dB dB dB dB dB RII VCL SIN RL GIN(MIN) GIN(MAX) GSTEP eIN VDC G=11.25dB Adjacent gain steps G=18.75 to MUTE Pin7,17 Input 1,2,3 35 2 80 4 -1 0 11.25 3.75 2 4 4 20 1 50 2.5 100 70 k Vrms dB k dB dB dB V mV mV HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 3 Silan Semiconductors (continued) SC7313 Test conditions Min 12 1 34 13 1 Parameter BASS CONTROL (note 1) Control Range Step resolution Internal feedback resistance TREBLE CONTROL (note 1) Control Range Step resolution AUDIO OUTPUTS Clipping level Output load resistance Output load capacitance Output resistance DC voltage level GENERAL Symbol Typ 14 2 44 14 2 Max 16 3 58 15 3 Unit GB BSTEP RB Maximum boost/cut dB dB k Gt TSTEP Maximum boost/cut dB dB VOCL RL CL ROUT VOUT THD=0.3% 2 4 2.5 Vrms k 10 nF V V 15 V V dB 0.1 0.3 % % % dB 1 2 1 dB dB V V +5 0.4 A V 30 4.2 BW=20 ~20kHz,flat output muted 75 4.5 2.5 5 3 106 0.01 0.09 0.04 120 4.8 Output noise eNO BW=20 ~20kHz,flat All gains=0dB A curve, all gains =0 dB Signal to noise ratio Distortion Channel separation left/right Total tracking error BUS INPUTS Input low voltage Input high voltage Input current Output voltage SDA acknowledge NOTES: S/N d Sc All gains=0dB; Vo=1Vrms Av=0,VIN=10mV Av=-20dB, VIN=1Vrms Av=-20dB,VIN=0.3Vrms 80 AV=0 to -20 dB AV=-20 to -60 dB 103 0 0 VIL VIH IIN Vo Io=1.6mA 3 -5 (1) Bass and treble response see Figure 16. The center frequency and quality of the response behavior can be chosen by the external circuitry. A standard first order bass response can realized by a standard feedback network. (2) The selected input is grounded through the 2.2F capacitor. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 4 Silan Semiconductors TYPICAL CHARACTERISTICS PERFORMANCE Fig.1 Loudness vs. Volume Attention 20 20 SC7313 Fig.2 Loudness vs. Frequency vs. volume Attenuation Fig.3 Loudness vs. External Capacitors CLOUD=100nF Loudness (dB) 15 0 -10 Loudness (dB) Loudness (dB) -20 56nF 100nF Shorted to VREF -40 OPEN 10 -20 220nF -30 10nF 5 -40 0 0 10 20 30 40 50 -60 100 1k 10k 10 100 1k 10k 100k Volume Attention (dB) Frequency (Hz) Frequency (Hz) Fig.4 Noise vs.Volume/Gain settings 1V 100k Fig.5 Signal to Noise Ratio vs.Volume settings 1 Fig.6 Distortion & Noise vs. Frequency VIN=1Vrms AV=0dB All controls Flat THD & Noise (%) Volume=-20dB -1 10 Noise (V Noise (V 10k VIN=1V 1k S/N=76dB S/N=106dB 10 Volume=0dB -2 10 22Hz ~ 22kHz 3 A Curve 100 10 1 -80 -60 -40 -20 0 1 -80 -60 -40 -20 VIN=316V -3 10 0 20 10 100 1k 10k 100k Volume (dB) Volume (dB) Frequency (dB) Fig.7 Distortion & Noise vs. Frequency 1 VIN=250mVrms AV=0dB All controls Flat -1 10 Fig.8 Distortion vs. Load Resistance 110 Fig.9 Channel Separation(LR) vs. Frequency THD & Noise (%) -1 10 Volume=-20dB Channel Separation (dB) 100 THD (%) 90 Volume=0dB -2 10 VIN=1Vrms AV=0dB All controls Flat 80 70 -3 10 10 100 1k 10k 100k -2 10 0.1 1 1 10 2 10 3 10 4 10 Frequency (dB) Load Resistance (k) Frequency (Hz) HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 5 Silan Semiconductors TYPICAL CHARACTERISTICS PERFORMANCE (continued) Fig.10 Input Separation ( L1L2,L3,L4) vs. Frequency 110 100 SC7313 Fig.11 Supply Voltage Rejection vs. Frequency Fig.12 Output Clipping Level vs. Supply Voltage Output Clipping Level (v) Channel Separation (dB) Channel Separation (dB) 90 5.0 RL=10k f=1kHz THD=0.3% 4.0 100 80 90 VIN=1Vrms AV=0dB All controls Flat 70 Vsvr=0.5Vrms All Input to GND AV=0dB All controls Flat 3.0 80 60 2.0 70 1.0 1 10 2 10 3 10 4 10 1 10 2 10 3 10 4 10 4 6 8 10 12 Frequency (Hz) Frequency (Hz) Supply Voltage (V) Fig.13 Quiescent current vs. Supply Voltage 9.0 Fig.14 Supply current vs. Temperature 50 Fig.15 Bass resistance vs. Temperature Quiescent Current (mA) Quiescent Current (mA) 8.5 48 8.0 8.0 Vs=9V Bass Resistance (k 30 () 60 90 46 6.0 7.5 44 4.0 7.0 42 2.0 4 6 8 10 12 6.5 -60 -30 0 40 -60 -30 0 30 () 60 90 Supply Voltage (V) Fig.16 Typical Tone Response (with the Ext components indicated the test circuit) 15 AV=0dB 10 Tone Response (dB) 5 0 -5 -10 -15 1 10 2 10 3 10 4 10 Frequency (Hz) HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 6 k k Temperature Temperature Silan Semiconductors APPLICATION NOTES 1. I C BUS INTERFACE 2 SC7313 Data transmission from microprocessor to the SC7313 and viceversa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL(pull-up resistors to positive supply voltage must be connected). 2. DATA VALIDITY As shown in Figure 17, the data of the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the dtat line can only change when the clock signal on the SCL line is LOW. SDA SCL DATA LINE STABLE, DATA VALID CHANGE DATA ALLOWED Fig. 17 Data Validity on the I2C BUS 3. START AND STOP CONDITIONS As shown in Figure 18, a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. SCL // I 2C BUS SDA // start stop Fig. 18 Timing diagram of I2C BUS 4. BYTE FORMAT Every byte transferred on the SDA line must obtain 8 bits. Each byte must be followed by the an acknowledge bit. The MSB is transferred first. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 7 Silan Semiconductors 5. ACKNOWLEDGE SC7313 The master(microprocessor) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse(see Figure 19). The peripheral(audioprocessor) that acknowledges has to pull-down(LOW) the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse. The audioprocessor which has been addressed has to generate an acknowledge after the reception of each byte , otherwise the SDA line remain at the HIGH level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. SCL 1 2 3 // 7 8 9 SDA start MSB // Acknowledgment from receiver Fig. 19 Acknowledge on the I2C BUS 6. TRANSMISSION WITHOUT ACKNOWLEDGE Avoiding to detect the acknowledge of the audioprocessor, the microprocessor can use a simpler transmission: simply it waits one clock without checking the slave acknowledgig, and sends the new data. This approach of course is less protected from mis-working and decreases the noise immunity. SOFTWARE SPECIFICATION 1. Interface protocol The interface protocol comprises: A start conditions A chip address byte, containing the SC7313 address(the 8th bit of the bytes must be 0). The SC7313 must always acknowledge at the end of each transmitted byte. A sequence of data(N-bytes + acknowledge) A stop condition (P) SC7313 address MSB LSB S 1 0 0 0 1 0 0 0 ACK MSB DATA LSB MSB ACK LSB ACK P DATA ACK: Acknowledge S: Start P: Stop Max clock speed: 100kbits/sec Data Transferred (N-Bytes + Acknowledge) HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 8 Silan Semiconductors 2. Chips address SC7313 0 0 1 0 0 0 (LSB) 1 (MSB) 0 3. Data bytes MSB 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 1 B2 0 1 0 1 0 1 1 B1 B1 B1 B1 B1 G1 0 1 B0 B0 B0 B0 B0 G0 C3 C3 A2 A2 A2 A2 A2 S2 C2 C2 A1 A1 A1 A1 A1 S1 C1 C1 LSB A0 A0 A0 A0 A0 S0 C0 C0 Function Volume Control Speaker ATT LR Speaker ATT RR Speaker ATT LF Speaker ATT RF Audio switch Bass control Treble control Note: Ax=1.25dB steps;Bx=10dB steps;Cx=2dB steps;Gx=3.75dB steps DETAILED DESCRIPTION OF DATA BYTES 1. Volume MSB 0 0 B2 B1 B0 A2 0 0 0 0 1 1 1 1 0 0 B2 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 A2 A1 0 0 1 1 0 0 1 1 A1 LSB A0 0 1 0 1 0 1 0 1 A0 Function Volume 1.25dB steps 0 -1.25 -2.5 -3.75 -5 -6.25 -7.5 -8.75 Volume 10dB steps 0 -10 -20 -30 -40 -50 -60 -70 For example, a volume of -45dB is given by: 00100100 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 9 Silan Semiconductors 2. speaker attenuators SC7313 LSB Function Speaker ATT LF Speaker ATT RF Speaker ATT LR Speaker ATT RR 0 -1.25 -2.5 -3.75 -5 -6.25 -7.5 -8.75 0 -10 -20 -30 1 1 1 MUTE B0 B0 B0 B0 A2 A2 A2 A2 0 0 0 0 1 1 1 1 A1 A1 A1 A1 0 0 1 1 0 0 1 1 A0 A0 A0 A0 0 1 0 1 0 1 0 1 MSB 1 1 1 1 0 0 1 1 0 1 0 1 B1 B1 B1 B1 0 0 1 1 1 0 1 0 1 1 For example, attenuation of 25dB on speaker RF is given by: 10110100 4. Audio switch MSB 0 1 0 G1 G0 S2 S1 0 0 1 1 0 1 0 0 1 1 0 1 0 1 LSB S0 0 1 0 1 Function Audio switch Stereo 1 Stereo 2 Stereo 3 Stereo 4 Loudness ON Loudness OFF +11.25dB +7.5dB +3.75dB 0dB For example, to select the stereo 2 input with a gain of +7.5dB Loudness ON the 8bit string is: 01001001 Note: Stereo4 is connected internally, but not available on pins. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 10 Silan Semiconductors 5.Bass and treble MSB 0 0 1 1 1 1 0 1 C3 C3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 C3=Sign For Example, bass at -10dB is obtained by the following 8bit string is: 01100010. C2 C2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 C1 C1 0 0 1 1 0 0 1 1 1 1 0 0 1 1 0 0 LSB C0 C0 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0 SC7313 Function Bass Terble -14 -12 -10 -8 -6 -4 -2 0 0 2 4 6 8 10 12 14 TEST AND TYPICAL APPLICATION CIRCUIT 2.2F 5.6k 100 nF 100 nF 100 nF 2.7nF MCU 28 DGND 27 SDA 26 SCL 17 16 12 19 18 4 10F OUT(L) IN(L) LOUD BOUT (L) (L) BIN TREBLE (L) (L) OUT LF AM/FM TUNER 11 R1 2.2F 25 10F 15 L1 2.2F CD PLAYER 10 R2 2.2F OUT RF 24 10F SC7313 14 L2 OUT LR 2.2F 23 10F 9 TAPE 2.2F R3 OUT LR VDD AGND CREF OUT(R) IN(R) LOUD BOUT (R) (R) BIN TREBLE (R) (R) 13 L3 2.2F 22 2 3 1 22F 7 6 8 100 nF 21 100 nF 20 100 nF 5.6k 5 2.7nF VDD 2.2F HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 11 Silan Semiconductors PACKAGE OUTLINE SC7313 UNIT:mm 2.54 0.25B 0.05 DIP-28-600-2.54 13.8B 0.25 37.34B0.3 1.52B0.5 3.00MIN 4.96MAX 15.24(600) 15 degree 0.5MIN 0.46B0.08 2.16MAX SOP-28-375-1.27 UNIT:mm 1.27 17.75B0.25 10.2B 0.45B0.1 2.8 MAX 0.15B0.05 16.51 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 12 9.525(375) 0.4 7.6B 0.3 Silan Semiconductors Attach Revision History Data 2000.12.31 2002.02.26 SC7313 REV 1.0 1.1 Original Modify the "package outline" Description Page 12 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.1 2002.02.26 13 |
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